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12/05/08 benefits improved gate, avalanche and dynamicdv/dt ruggedness fully characterized capacitance andavalanche soa enhanced body diode dv/dt and di/dtcapability lead-free halogen-free www.irf.com 1 IRFB3207ZGPBF applications high efficiency synchronous rectification in smps uninterruptible power supply high speed power switching hard switched and high frequency circuits hexfet power mosfet s d g gds gate drain source to-220ab IRFB3207ZGPBF v dss 75v r ds ( on ) typ. 3.3m max. 4.1m i d ( silicon limited ) 170a i d (package limited) 120a d s d g absolute maximum ratings symbol parameter units i d @ t c = 25c continuous drain current, vgs @ 10v (silicon limited) i d @ t c = 100c continuous drain current, v gs @ 10v (silicon limited) a i d @ t c = 25c continuous drain current, v gs @ 10v (wire bond limited) i dm pulsed drain current p d @t c = 25c maximum power dissipation w linear derating factor w/c v gs gate-to-source voltage v dv/dt peak diode recovery v/ns t j operating junction and t stg storage temperature range soldering temperature, for 10 seconds (1.6mm from case) mounting torque, 6-32 or m3 screw avalanche characteristics e as (thermally limited) sin g le pulse avalanche ener g y mj i ar avalanche current a e ar repetitive avalanche ener g y mj thermal resistance symbol parameter typ. max. units r jc junction-to-case CCC 0.50 r cs case-to-sink, flat greased surface , to-220 0.50 CCC c/w r ja junction-to-ambient, to-220 CCC 62 c 170 see fig. 14, 15, 22a, 22b 300 16 -55 to + 175 20 2.0 10lbf in (1.1n m) 300 max. 170 120 670 120 downloaded from: http:///

2 www.irf.com calculated continuous current based on maximum allowable junction temperature. bond wire current limit is 120a. note that current limitations arising from heating of the device leads may occur withsome lead mounting arrangements. repetitive rating; pulse width limited by max. junction temperature. limited by t jmax , starting t j = 25c, l = 0.033mh r g = 25 ? , i as = 102a, v gs =10v. part not recommended for use above this value. s d g i sd 75a, di/dt 1730a/s, v dd v (br)dss , t j 175c. pulse width 400s; duty cycle 2%. c oss eff. (tr) is a fixed capacitance that gives the same charging time as c oss while v ds is rising from 0 to 80% v dss . c oss eff. (er) is a fixed capacitance that gives the same energy as c oss while v ds is rising from 0 to 80% v dss . r is measured at t j approximately 90c. static @ t j = 25c (unless otherwise specified) symbol parameter min. typ. max. units v (br)dss drain-to-source breakdown volta g e 75 CCC CCC v ? v (br)dss / ? t j breakdown volta g e temp. coefficient CCC 0.091 CCC v/c r ds(on) static drain-to-source on-resistance CCC 3.3 4.1 m ? v gs(th) gate threshold volta g e 2.0 CCC 4.0 v r g(int) internal gate resistance CCC 0.8 CCC ? i dss drain-to-source leaka g e current CCC CCC 20 a CCC CCC 250 i gss gate-to-source forward leaka g e CCC CCC 100 na gate-to-source reverse leaka g e CCC CCC -100 dynamic @ t j = 25c (unless otherwise specified) symbol parameter min. typ. max. units g fs forward transconductance 280 CCC CCC s q g total gate char g e CCC 120 170 q gs gate-to-source char g e CCC 27 CCC q gd gate-to-drain ("miller") char g e CCC 33 CCC q sync total gate char g e sync. (q g - q gd ) CCC 87 CCC t d(on) turn-on delay time CCC 20 CCC t r rise time CCC 68 CCC t d(off) turn-off delay time CCC 55 CCC t f fall time CCC 68 CCC c iss input capacitance CCC 6920 CCC c oss output capacitance CCC 600 CCC c rss reverse transfer capacitance CCC 270 CCC c oss eff. (er) effective output capacitance (energy related) CCC 770 CCC c oss eff. (tr) effective output capacitance (time related) CCC 960 CCC diode characteristics symbol parameter min. typ. max. units i s continuous source current (body diode) i sm pulsed source current 670 (body diode) v sd diode forward volta g e CCC CCC 1.3 v t rr reverse recovery time CCC 36 54 ns t j = 25c v r = 64v, CCC 41 62 t j = 125c i f = 75a q rr reverse recovery char g e CCC 50 75 nc t j = 25c di / dt = 100a / s CCC 67 100 t j = 125c i rrm reverse recovery current CCC 2.4 CCC a t j = 25c t on forward turn-on time intrinsic turn-on time is ne g li g ible (turn-on is dominated by ls+ld) 170 CCCCCC CCCCCC nc ns pf a i d = 75a r g = 2.7 ? v gs = 10v v dd = 49v i d = 75a, v ds =0v, v gs = 10v t j = 25c, i s = 75a, v gs = 0v integral reverse p-n junction diode. conditions v gs = 0v, i d = 250a reference to 25c, i d = 5ma v gs = 10v, i d = 75a v ds = v gs , i d = 150a v ds = 75v, v gs = 0v v ds = 75v, v gs = 0v, t j = 125c mosfet symbol showing the v ds = 38v conditions v gs = 10v v gs = 0v v ds = 50v ? = 1.0mhz v gs = 0v, v ds = 0v to 60v v gs = 0v, v ds = 0v to 60v conditions v ds = 50v, i d = 75a i d = 75a v gs = 20v v gs = -20v downloaded from: http:///

www.irf.com 3 fig 1. typical output characteristics fig 3. typical transfer characteristics fig 4. normalized on-resistance vs. temperature fig 2. typical output characteristics fig 6. typical gate charge vs. gate-to-source voltage fig 5. typical capacitance vs. drain-to-source voltage 0.1 1 10 100 v ds , drain-to-source voltage (v) 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) vgs top 15v 10v 8.0v 6.0v 5.5v 5.0v 4.8v bottom 4.5v 60s pulse width tj = 25c 4.5v 2 3 4 5 6 7 v gs , gate-to-source voltage (v) 0.1 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) t j = 25c t j = 175c v ds = 25v 60s pulse width -60 -40 -20 0 20 40 60 80 100 120 140 160 180 t j , junction temperature (c) 0.5 1.0 1.5 2.0 2.5 r d s ( o n ) , d r a i n - t o - s o u r c e o n r e s i s t a n c e ( n o r m a l i z e d ) i d = 75a v gs = 10v 1 10 100 v ds , drain-to-source voltage (v) 100 1000 10000 100000 c , c a p a c i t a n c e ( p f ) v gs = 0v, f = 1 mhz c iss = c gs + c gd , c ds shorted c rss = c gd c oss = c ds + c gd c oss c rss c iss 0 20 40 60 80 100 120 140 q g , total gate charge (nc) 0.0 2.0 4.0 6.0 8.0 10.0 12.0 v g s , g a t e - t o - s o u r c e v o l t a g e ( v ) v ds = 60v v ds = 38v v ds = 15v i d = 75a 0.1 1 10 100 v ds , drain-to-source voltage (v) 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) 4.5v 60s pulse width tj = 175c vgs top 15v 10v 8.0v 6.0v 5.5v 5.0v 4.8v bottom 4.5v downloaded from: http:///

4 www.irf.com fig 8. maximum safe operating area fig 10. drain-to-source breakdown voltage fig 7. typical source-drain diode forward voltage fig 11. typical c oss stored energy fig 9. maximum drain current vs. case temperature fig 12. maximum avalanche energy vs. draincurrent 0.0 0.5 1.0 1.5 2.0 2.5 v sd , source-to-drain voltage (v) 0.1 1 10 100 1000 i s d , r e v e r s e d r a i n c u r r e n t ( a ) t j = 25c t j = 175c v gs = 0v -60 -40 -20 0 20 40 60 80 100 120 140 160 180 t j , temperature ( c ) 70 75 80 85 90 95 100 v ( b r ) d s s , d r a i n - t o - s o u r c e b r e a k d o w n v o l t a g e ( v ) id = 5ma -10 0 10 20 30 40 50 60 70 80 v ds, drain-to-source voltage (v) 0.0 0.5 1.0 1.5 2.0 2.5 e n e r g y ( j ) 1 10 100 v ds , drain-to-source voltage (v) 0.1 1 10 100 1000 10000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) operation in this area limited by r ds (on) tc = 25c tj = 175c single pulse 100sec 1msec 10msec dc 25 50 75 100 125 150 175 t c , case temperature (c) 0 20 40 60 80 100 120 140 160 180 i d , d r a i n c u r r e n t ( a ) limited by package 25 50 75 100 125 150 175 starting t j , junction temperature (c) 0 100 200 300 400 500 600 700 e a s , s i n g l e p u l s e a v a l a n c h e e n e r g y ( m j ) i d top 17a 30a bottom 102a downloaded from: http:///

www.irf.com 5 fig 13. maximum effective transient thermal impedance, junction-to-case fig 14. typical avalanche current vs.pulsewidth fig 15. maximum avalanche energy vs. temperature notes on repetitive avalanche curves , figures 14, 15:(for further info, see an-1005 at www.irf.com) 1. avalanche failures assumption: purely a thermal phenomenon and failure occurs at a temperature far inexcess of t jmax . this is validated for every part type. 2. safe operation in avalanche is allowed as long ast jmax is not exceeded. 3. equation below based on circuit and waveforms shown in figures 16a, 16b.4. p d (ave) = average power dissipation per single avalanche pulse. 5. bv = rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. i av = allowable avalanche current. 7. ? t = allowable rise in junction temperature, not to exceed t jmax (assumed as 25c in figure 14, 15).t av = average time in avalanche. d = duty cycle in avalanche = t av f z thjc (d, t av ) = transient thermal resistance, see figures 13) p d (ave) = 1/2 ( 1.3bvi av ) = t/ z thjc i av = 2 t/ [1.3bvz th ] e as (ar) = p d (ave) t av 1e-006 1e-005 0.0001 0.001 0.01 0.1 t 1 , rectangular pulse duration (sec) 0.001 0.01 0.1 1 t h e r m a l r e s p o n s e ( z t h j c ) 0.20 0.10 d = 0.50 0.02 0.01 0.05 single pulse ( thermal response ) notes: 1. duty factor d = t1/t2 2. peak tj = p dm x zthjc + tc ri (c/w) i (sec) 0.1049 0.0000990.2469 0.001345 0.1484 0.008469 j j 1 1 2 2 3 3 r 1 r 1 r 2 r 2 r 3 r 3 c ci i / ri ci= i / ri 25 50 75 100 125 150 175 starting t j , junction temperature (c) 0 20 40 60 80 100 120 140 160 180 200 e a r , a v a l a n c h e e n e r g y ( m j ) top single pulse bottom 1.0% duty cycle i d = 102a 1.0e-06 1.0e-05 1.0e-04 1.0e-03 1.0e-02 1.0e-01 tav (sec) 0.1 1 10 100 1000 a v a l a n c h e c u r r e n t ( a ) 0.05 duty cycle = single pulse 0.10 allowed avalanche current vs avalanche pulsewidth, tav, assuming ? j = 25c and tstart = 150c. 0.01 allowed avalanche current vs avalanche pulsewidth, tav, assuming ? tj = 150c and tstart =25c (single pulse) downloaded from: http:///

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fig 16. threshold voltage vs. temperature

-75 -50 -25 0 25 50 75 100 125 150 175 200 t j , temperature ( c ) 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 v g s ( t h ) , g a t e t h r e s h o l d v o l t a g e ( v ) i d = 150a i d = 250a i d = 1.0ma i d = 1.0a 0 200 400 600 800 1000 di f /dt (a/s) 0 5 10 15 20 i r r ( a ) i f = 45a v r = 64v t j = 25c t j = 125c 0 200 400 600 800 1000 di f /dt (a/s) 0 5 10 15 20 i r r ( a ) i f = 30a v r = 64v t j = 25c t j = 125c 0 200 400 600 800 1000 di f /dt (a/s) 20 100 180 260 340 q r r ( a ) i f = 30a v r = 64v t j = 25c t j = 125c 0 200 400 600 800 1000 di f /dt (a/s) 20 100 180 260 340 q r r ( a ) i f = 45a v r = 64v t j = 25c t j = 125c downloaded from: http:///

www.irf.com 7 fig 22a. switching time test circuit fig 22b. switching time waveforms v gs v ds 90% 10% t d(on) t d(off) t r t f v gs pulse width < 1s duty factor < 0.1% v dd v ds l d d.u.t + - fig 21b. unclamped inductive waveforms fig 21a. unclamped inductive test circuit t p v (br)dss i as r g i as 0.01 ? t p d.u.t l v ds + - v dd driver a 15v 20v v gs fig 23a. gate charge test circuit fig 23b. gate charge waveform vds vgs id vgs(th) qgs1 qgs2 qgd qgodr fig 20. !
for n-channel hexfet power mosfets 1k vcc dut 0 l
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8 www.irf.com to-220ab packages are not recommended for surface mount application.

data and specifications subject to change without notice. this product has been designed and qualified for the industrial market. qualification standards can be found on irs web site. ir world headquarters: 233 kansas st., el segundo, california 90245, usa tel: (310) 252-7105 tac fax: (310) 252-7903 visit us at www.irf.com for sales contact information . 12/2008

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